This position involves extensive hands-on experience with CPU verification using industry standard functional verification methodologies and reference
Our client is working on next-generation Semiconductor programs for its global clientele and looking for top talent in VLSI technologies with the following
Key ResponsibilitiesDefine the DFT Architecture for the next generation SoCs.Implementation & verification including Scan, PMBIST, JTAG and other DFT's related
Key Responsibilities .Define the DFT Architecture for the next generation SoCs. .Implementation & verification including Scan, PMBIST, JTAG and other DFT's
Date Posted: 2024-01-16 Country: India Location: North Gate Business Park Sy.No 2/1, and Sy.No 2/2, KIAL Road, Venkatala Village, Chowdeshwari Layout,
What you'll be doing: Work in an international team innovating space communication. Work with architecture and design teams to define verification goals.
Low level programming (interaction with hardware) using C language in multi-threaded , multi-processor , highly-available systems. Understanding of various h /
The ideal candidate will be required to work on both IP development and integration into SoCs catering to various markets and tech nodes. Job will involve RTL
Processor Verification Engineer | Banglore,India | ENS190102AJob Reference: ENS190102A-PRVEN : PROCESSOR VERIFICATION ENGINEER/LEAD (Bangalore, India)Skill
Senior Verification Engineer/Lead | Banglore,India | ENS170908GJob Reference: ENS170908G-SRVEL : SENIOR VERIFICATION ENGINEER/LEAD (Bangalore, India)Skill Set:
Wafer Space is looking for expert DFT engineers for development, support, maintenance, Implementation and Testing of complex components of an
Wafer Space is looking for some expert RTL Front End Design Engineers, having good knowledge of ASIC design flow. This will be a very challenging and exciting
Date Posted: 2023-09-12 Country: India Location: North Gate Business Park Sy.No 2/1, and Sy.No 2/2, KIAL Road, Venkatala Village, Chowdeshwari Layout,