Computer Chip Design

Performs the full-chip floorplanning and design planning for SoC or subsystem/subFC. Defines the physical dimensions of the IP or SoC with consideration for

Defines the physical dimensions of the IP or SoC with consideration for overall product costs such as die size optimization, die per reticle/good die per wafer

The era of pervasive AI has arrived. In this era, organizations will use generative AI to unlock hidden value in their data, accelerate processes, reduce

� Work closely with design and CAD team, to develop and deploy circuit simulation, layout validation methodologies to efficiently use tools, to improve

This position is within the Design Enablement (DE) which is one of the key pillars enabling Intel to deliver winning products in the marketplace. As part of

Job Description Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people

Who you'll work with: Be part of the development organization as an ASIC implementation engineer in Bangalore, India with a primary focus on Design-for-Test.

Siemens EDA, a part of Siemens Digital Industries Software, is a global technology leader in electronic design automation. Our technologies enable companies

We are now looking for a DFT Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the

About NCR VOYIX NCR VOYIX Corporation (NYSE: VYX) is a leading global provider of digital commerce solutions for the retail, restaurant and banking industries.

Job Title: Electrical Engineer - Our Team AGS India Engineering - About Applied Applied Materials is the leader in materials engineering solutions used to

Who You'll Work With Be part of the development organization as an ASIC implementation engineer in Bangalore, India with a primary focus on Design-for-Test.

Who you'll work with: Be part of the development organization as an ASIC implementation engineer in Bangalore, India with a primary focus on Design-for-Test.